1. Field of the Invention
This invention relates to the formation of an interconnect film in the manufacturing process of a semiconductor represented by ultra large scale integrated circuit (ULSI) and, particularly, a method for filling the hole of a connecting part or an interconnect groove with an interconnect film material and providing satisfactory adhesion by forming a copper or copper alloy interconnect material film by any one of plating, chemical vapor deposition (CVD), and physical vapor deposition (PVD), and further treating it under a high-pressure, high-temperature gas atmosphere.
2. Description of the Prior Art
Japanese Patent No. 2660040 (registered: Jun. 6, 1997) discloses xe2x80x9ca vacuum filming method which comprises steps of forming a metal thin film on a substrate having a recessed part by a vacuum thin film forming method such as sputtering, CVD, vacuum evaporation or the like; heating the whole metal thin film formed on the substrate to fluidize it; and pressurizing the metal of the fluidized metal thin film by a gas to fill the recessed part with the metal of the metal thin film in such a manner that no cavity is produced within the recessed partxe2x80x9d (Prior Art 1).
Japanese Patent Application Laid-Open No. 7-193063 discloses xe2x80x9ca method for processing an article having a surface, the surface having at least one recessed part within the surface, which comprises forming a layer on at least a part of the surface so that the layer is extended above the recessed part, and exposing the article and the layer to a high pressure and high temperature sufficient to deform a part of the layer so as to fill the recessed partxe2x80x9d (Prior Art 2).
It is described in this known data that the article consists of a semiconductor wafer, the recessed part consists of a hole, groove or via formed on the semiconductor wafer, and the layer consists of a metal such as aluminum. It is also disclosed that a gas is usable for pressurization at a temperature of 350-650xc2x0 C. and a pressure of 3,000 psi or more when the layer is aluminum, and it is necessary to set the thickness of the layer formed on the hole or groove equal to at least the width of the hole. Further, it is also described that the semiconductor itself, even if a plurality of layers having different characteristics are included therein, can be manufactured as the result of a manufacturing process including a plurality of steps in order to form it.
As the method for filling the cavity formed in the hole or groove mainly in order to improve the conductivity of the semiconductor interconnect film, it is shown in these prior arts that the crush or inflow by a high pressure at a high temperature is effective. However, the Al interconnect films shown in these known data have reached the limit in respect to EM resistance (Electron Migration) and reduction in electric resistance which are required as the connecting material according to the future fining of ULSI. Although expectations are recently placed on Cu which is regarded to be superior to Al in these respects, the equal result can not be obtained even if the above prior arts 1 and 2 are applied thereto in the same manner, since the filming condition and the texture of the film after deposition are largely differed from those of Al.
As a result of experimental examinations on the application of these prior arts mainly to a copper interconnect film, the prevent inventors found that there were further several problems in the application to industrial production.
The first problem is that a filming material must be laid in the state where it perfectly covers the hole or groove at the time of film deposition in order to form a texture having no pore in the hole or groove part by high pressure filling treatment. Although sputtering is conventionally used for the formation of an Al or Alxe2x80x94Cu alloy interconnect film, it is hardly used for the copper interconnect film because of the difficulty of line formation by etching process which is the after process. Attention is given to wet plating (electroplating or electroless plating) for the copper interconnect film. The wet plating has a problem of the necessity of new construction of a plating equipment and another factory, while the sputtering is suitable to reduce the equipment cost since most ULSI makers already hold the equipment therefor.
The present inventors proposed a method for providing a sound interconnect structure by forming a copper interconnect film by this sputtering method, and extinguishing pores formed under it by a treatment under high-pressure gas atmosphere (Japanese Patent Application Nos. 10-63439, 10-91651, and 10-113649), but it is the actual state that this method has the following subjects.
Namely, since the texture or property of the formed film is largely changed depending on how to set the film deposition condition in the sputtering, the setting of the film deposition condition is extremely important, and the temperature of a film deposition also has a great influence on the properties of the formed film. The condition of sputtering for efficiently blocking the hole or groove is that a substrate is heated to 300xc2x0 C. or higher. In this case, however, a phenomenon of growing the crystal grain size up to about several microns occurs although the opening part of the hole or groove is filled.
When the hole diameter is small as 0.25 xcexcm or less in a thus-formed copper interconnect film (purity: 99.99% or more), the state as a monocrystal is put on the hole part is formed. A pressure filling by plastic deformation phenomenon is necessary to extinguish the pores of the copper or copper alloy material in this state, which brings about a problem of the necessity of a pressure of 100 MPa or more even at a temperature of 450xc2x0 C. One of the causes thereof is that the crystal structure of the copper film consists large copper crystal grains and has strong orientation (111) to the substrate surface.
The pressurizing treatment at such a high temperature is a significant subject in respect to the combination of the lower electric resistance and an insulating film having a low dielectric constant for the higher treatment speed of a semiconductor device in the future. Namely, as the low dielectric constant insulating film material, a heat resisting resin material has been regarded as a promising candidate, and its development has been progressed. However, its heat resisting temperature is only about 400xc2x0 C., and the temperature in the pressurizing treatment is set to 400xc2x0 C. or lower and, preferably, 380xc2x0 C. or lower.
This invention thus has an object to provide a method of forming an interconnect film in which pores of a copper or copper alloy interconnect film formed by use of any one of plating, CVD, and PVD can be extinguished with the lowest pressure possible.
This invention provides a method of forming an interconnect film by covering the surface of the insulating film of a substrate having the insulating film having a hole or groove formed thereon with a copper or copper alloy metallic material, thereby filling the hole or groove inner part with the metal material, and the following technical means are adapted.
Namely, a method of forming an interconnect film of this invention according to the first invention comprises precipitating a metallic material of copper or copper alloy consisting of crystal grains in the hole or groove inner part and on the surface of a barrier layer on an insulating film or a seed layer formed on the barrier layer by means of plating or CVD, and then heating the whole body under a high-pressure gas atmosphere to progress the crystal grain growth of the crystal grains in the metallic material while suppressing generation of pores, thereby covering the whole surface of the substrate and the hole or groove inner part with the metallic material film substantially free from pores.
A method of forming an interconnect film of this invention according to the second invention comprises precipitating a metallic material of copper or copper alloy consisting of crystal grains in the hole or groove inner part and on the surface of a barrier layer on an insulating film or a seed layer formed on the barrier layer by means of PVD, and then heating the whole body including the substrate under a high-pressure gas atmosphere to progress the crystal grain growth of the crystal grains in the metallic material while suppressing generation of pores, thereby covering the whole surface of the substrate and the hole or groove inner part with the metallic material film substantially free from pores.
A method of forming an interconnect film of this invention according to the third invention comprises forming a barrier layer on the insulating film by means of CVD or PVD, exposing the resulting substrate to a high-temperature, high-pressure gas atmosphere to closely fit the barrier layer to the insulating film, precipitating the metallic material of copper or copper alloy consisting of crystal grains in the hole or groove inner part and on the surface of the barrier layer on the insulating film or a seed layer formed on the barrier layer, and then heating the whole body under a high-pressure gas atmosphere to progress the crystal grain growth of the crystal grains in the metallic material while suppressing generation of pores, thereby covering the whole surface of the substrate and the hole or groove inner part with the metallic material film substantially free from pores.
A method of forming an interconnect film of this invention according to the fourth invention comprises forming a barrier layer on the insulating film by means of CVD or PVD, exposing the substrate to a high-temperature, high-pressure gas atmosphere to closely fit the barrier layer to the insulating film, precipitating the metallic material of copper or copper alloy consisting of crystal grains in the hole or groove inner part and on the surface of the barrier layer on the insulating film or a seed layer formed on the barrier layer by any one of plating, CVD and PVD, and then heating the whole body under a high-pressure gas atmosphere after adding hydrogen to the metallic material film to progress the crystal grain growth of the crystal grains in the metallic material while suppressing generation of pores, thereby covering the whole surface of the substrate and the hole or groove inner part with the metallic material film substantially free from pores.
The xe2x80x9csubstratexe2x80x9d referred herein means a Si substrate (semiconductor substrate), the xe2x80x9cplatingxe2x80x9d means wet plating, and the xe2x80x9cseed layerxe2x80x9d means a copper seed layer.
In this invention, it is advantageous to precipitate the crystal grains of the metallic material on the seed layer surface by means of electroplating after forming the seed layer on the barrier layer by means of CVD or sputtering.
Namely, since a SiO2 insulating film layer is formed on the Si substrate, the electroplating can not be applied thereto as it is. Therefore, a bed film (seed layer) is necessary, and the same material is naturally used therefor. For the formation of this seed layer, electroless plating may be adapted, but CVD and sputtering are recommended from the viewpoint of contamination prevention and film thickness controllability.
In the structures of this invention, the metallic material desirably consists of fine crystal grains having average crystal grain sizes of 0.1 xcexcm or less.
By setting the crystal grain size to 0.1 xcexcm or less, revelation of superplastic phenomenon becomes remarkable, and the non-poring at the lower pressure and the lower temperature can be attained.